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E-CoRe Energy-Efficient Computing via Reversibility

Source d’offres vérifiée

The E-CoRe project, funded by the European Union's Horizon Europe programme under the Marie Skłodowska-Curie Actions.

Research Services

À propos

E-CoRe (Energy-efficient Computing via Reversibility) is a European Marie Skłodowska-Curie Doctoral Network (Project 101226672) leading the "RC Revolution" to create a sustainable digital future. Coordinated by the University of Bologna, our consortium of 15 elite academic and industrial partners is rethinking the digital stack to bypass the physical limits of traditional computing. The Challenge: The Landauer Limit IT accounts for approximately 10% of global energy consumption. Conventional computers dissipate heat every time information is erased—a physical constraint known as the Landauer limit. As AI and blockchain demand more power, traditional hardware is hitting a "thermodynamic wall". The Solution: Reversible Computing (RC) RC is the only known way to circumvent this limit. By performing computations that can execute both forward and backward without discarding information, E-CoRe aims to achieve energy savings between 25% and 50% compared to mainstream technologies. Our Full-Stack Research Pillars We are developing the science and technology for energy-critical areas through four pillars: Languages: Moving reversible programming from academic prototypes to industrial-grade tools. Algorithms: Designing energy-efficient data structures and libraries. Architectures: Innovating optimized compilers and adiabatic/neuromorphic hardware simulation. Applications: Validating RC in high-impact domains: Machine Learning (AI accelerators), Blockchains (Proof-of-Work), and Cyber-Physical Systems (Drones). Training Future Leaders We are training 13 Doctoral Candidates (DCs) in a world-class environment featuring international secondments and specialized training in green computing.

Postes ouverts

PhD: Design and Simulation of Adiabatic Architectures — DC8

Sur place

The candidate will survey state-of-the-art reversible computing architectures and develop a software simulation platform based on chiplet concepts. They will also investigate the interaction between standard processors and RC adiabatic architectures.