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KTek ResourcingSource d’offres vérifiée

Senior Design Verification Engineer

Offre en anglais
  • Canada
  • Sur place
  • Publié 4 sept. 2026
  • 1 poste

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Type d’emploi
Contrat
Niveau d’expérience
Expérimenté · 5+ ans
Langue de l’offre
anglais
Heures de travail
40 heures par semaine
Niveau d’expérience
Mid-Senior level
Mode de candidature
La candidature directe est offerte

Résumé du poste

Lead the verification of 4-5 ASIC design blocks by developing UVM-based environments, sequences, and tests. Drive coverage collection and closure while owning end-to-end verification execution for assigned blocks.

Détails du poste

Mandate Skills: Design verification engineers with UVM experience ASIC Programs (Switch/NIC) DV • Lead or contribute to verification of 4–5 ASIC design blocks. • Develop UVM-based verification environments, sequences, tests, debug, and coverage closure. • Strong experience in SystemVerilog/UVM. • Ability to independently own verification deliverables. • Support customer collaboration in EST timezone. Required Skills • Strong SystemVerilog/UVM verification experience. • Ability to own design blocks independently and drive verification closure Responsibilities The DV team is expected to: • Own verification of 4–5 design blocks per ASIC • Develop and execute sequences • Perform test development and debug • Drive coverage collection and closure • Own end-to-end verification execution for assigned blocks • The customer will own the testbench infrastructure.

Ce que vous ferez

Lead the verification of 4-5 ASIC design blocks by developing UVM-based environments, sequences, and tests. Drive coverage collection and closure while owning end-to-end verification execution for assigned blocks.

Exigences

Requires strong experience in SystemVerilog and UVM for ASIC programs such as Switch or NIC. Candidates must be able to independently own verification deliverables and support collaboration in the EST timezone.

Compétences indiquées

  • Sens de l’organisation · Souhaitée
  • Collaboration · Souhaitée
  • Souci du détail · Souhaitée
  • Execution · Souhaitée
  • Development · Souhaitée
  • Customer · Souhaitée

Autres compétences pertinentes

Relevées dans la description du poste. Confirmez les exigences importantes ci-dessus.

  • SystemVerilog
  • UVM
  • ASIC Verification
  • Design Verification
  • Coverage Closure
  • Test Development
  • Debug

Domaines d’emploi

  • Engineering
  • Technology
  • Software

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